Certain serial data applications, such as data recording and serial data packet triggering, require receivers to have a very low bit error rate (BER), even in the presence of an input signal that may have worse noise characteristics than allowed by off-the-shelf components. Serial data test instruments have relied on either custom-designed application specific integrated circuits (ASICs) for maximum performance, or off-the-shelf serializer/deserializers (SERDES) and/or field programmable gate arrays (FPGAs) for flexibility.
ASICs may be designed to achieve excellent performance with respect to noise tolerance and operating speed. However ASICs lack flexibility, as not every possible need can be foreseen. As markets change, popular serial data protocols also change. Designing an ASIC to keep up with these changes requires building in more features, which adds to component cost, design time, power requirements and programming complexity. Even then, the amount of support available is limited to speculation.
A flexible off-the-shelf solution uses either an off-the-shelf SERDES connected to an FPGA, or an FPGA with a built-in SERDES. The FPGA may be reprogrammed to implement new trigger functionality or record data as needed by the test instrument. However the performance is limited to the SERDES manufacturer's capabilities and design goals, which often assume a functional data link to meet bit error rate specifications. Since test instruments are required to function in an environment where the data link is not known to be functional, or is known to be dysfunctional, off-the-shelf components don't solve the general purpose measurement instrument need.
Prior designs have included combining ASICs with off-the-shelf SERDES where the ASIC provides a reference clock for the SERDES or FPGA. These systems are still limited as (i) they can support only the protocols allowed by the SERDES; (ii) they are limited to the maximum signaling rate supported by the SERDES; and (iii) if the data is not retimed by the ASIC to remove timing noise, they are limited to the noise performance of the SERDES which likely does not meet the goals desired by the test instrument.
What is desired is a method of improving the performance and flexibility of serial data analysis in test instruments regardless of data bit rate, encoding scheme or communication protocol embodied in the serial data.